Manmeet's Paper to be Presented in the 2020 IEEE MWSCAS
Congratulations to Manmeet Singh for the acceptance of his paper entitled "A 2-A 6-MHz Hysteretic Buck Converter with an 8-Bit Digital Jitter-Insensitive Frequency Correction Loop using Dual-Sided Hysteretic Band Modulation," in the 2020 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, Aug. 2020.
Abstract: A 2-A current-mode hysteretic buck converter with constant switching frequency is proposed. The converter employs a high-resolution digital frequency correction loop and dual-sided hysteretic band modulation to tune and lock the steady-state switching frequency to a 6-MHz reference clock. As such, the superior dynamic performance of hysteretic control can be leveraged while also maintaining the predictable performance and simplified EMI filter design that result from a constant switching frequency. The dual-sided hysteretic band modulation eliminates any inductor current imbalance due to the continuous tuning of the switching frequency, and thus ensures smooth, transient-free frequency locking. Moreover, a hysteretic loop-suspension filter is proposed to desensitize the steady-state switching frequency of the converter to the 6-MHz reference clock jitter, which relaxes the specifications of the clock generator. Furthermore, due to its digital realization, the proposed frequency correction loop requires no passives to ensure stability. The converter is designed and simulated in a 0.13-µm CMOS technology. It operates from 2.7–5 V input and produces a 0.8–1.2 V output with a maximum load of 2 A. The converter achieves 90.5% peak efficiency and over 84% efficiency at 1-mA load. The output voltage ripple is less than 8 mV with a 220-nH inductor and a 6-µF output capacitor.